
Part Number: 12-401-DB42
Device: XC3SD1800A-4FGG676C
The XC3SD1800A-4FGG676C device on the daughter board is a member of the Spartan-3A DSP family of FPGAs. The Spartan-3A DSP provides a low-cost, high-performance DSP solution for high-volume, cost-critical applications.
The entire Spartan-3A DSP family includes two devices offering 1,800,000 and 3,400,000 gates. The XC3SD1800A-4FGG676C offers 1.8 million gates. Table 1 provides an information summary for this device.
| Package | 676-Ball Fine Pitch Ball Grid Array (FG676) |
| Speed Grade | Standard |
| Temperature Grade | Commercial |
| Pin Count | 676 |
| Maximum User I/O Pins | 519 (includes a maximum of 110 Input-only pins) |
| Max. Differential I/O Pairs | 227 |
| System Gates | 1,800,000 |
| Xilinx Logic Cells | 37,440 |
| CLB Array | 4,160 CLBs (88 rows by 48 columns). (1 CLB = 4 Slices, giving 16,640 Slices). |
| Embedded (Block) RAM | 1512K bits |
| Distributed RAM | 260K bits |
| Embedded Multipliers (18x18) | 84 (each 18x18 multiplier is part of an XtremeDSP™ DSP48A slice, which also includes an 18-bit pre-adder, 48-bit post-adder/accumulator and cascade capabilities) |
| Digital Clock Managers (DCM) | 8 |
| Global Clock Resources | 16 |
| Configuration Memory Required | 8,197,280 bits |
| On-Chip Termination Support | Yes |
More technical information on the Xilinx Spartan-3A DSP daughter board >
Use of the Spartan-3A DSP daughter board requires the winter 09 release or a later release of Altium Designer installed on your PC.
To implement a design on this FPGA device you will also require the relevant vendor tools. For more information visit Vendor Tools page.
Requests for further information on specifications for Xilinx FPGA devices can be emailed to Xilinx at: altium@xilinx.com
For information on all available NanoBoard configurations, pricing and availability contact your nearest Altium Sales & Support Center or VAR.